NAME OF COURSE/MODULE: VLSI DESIGN
COURSE CODE: SFE 4083
NAME(S) OF ACADEMIC STAFF: Dr. Affa Rozana Abd Rashid

Dr. Nadhrah Md Yatim

RATIONALE FOR THE INCLUSION OF THE COURSE/MODULE IN THE PROGRAMME: To enhance the basic knowledge and skills of students in integrated circuits programming prior to joining the working world or to pursuing further studies.
SEMESTER AND YEAR OFFERED: SEM 1/ / YEAR 4
TOTAL STUDENT LEARNING TIME (SLT) FACE TO FACE TOTAL GUIDED AND INDEPENDENT LEARNING
L = Lecture

T = Tutorial

P = Practical

O= Others

L

28

T

 

14

P

 

10

O

 

68

L + T + P + O = 120 HOURS

CREDIT VALUE: 3
PREREQUISITE (IF ANY): NONE
OBJECTIVES: 1.     To review the various technologies in VLSI.

2.     To provide an overview of VHDL coding.

3.      To exercise the skill onto mini project and simple design problem.

LEARNING OUTCOMES:

 

Upon successful completion of this course students should have the ability to:

1.     Understand the basic fundamental of VHDL code.

2.     Appreciate the enhancement of VHDL coding.

3.     Applied the skill towards the given project.

TRANSFERABLE SKILLS: Students should be able to develop problem solving skills through a process of lectures and tutorials.
TEACHING-LEARNING AND ASSESSMENT STRATEGY: Teaching-learning strategy:

  • The course will be taught through a combination of formal lectures, assignments, individual/group work, tutorials, informal activities and various textbooks.

Assessment strategy:

  • Formative
  • Summative
SYNOPSIS: This course is a review of VLSI programming focusing on VHDL. It provides an overview of the VDL Coding, Code structure, Data type, Object and Signals then farther towards the Concurrent and Sequential Statement of VHDL Code. The application phase were done by the given mini project.
MODE OF DELIVERY: Lecture, Individual and Group Work
ASSESSMENT METHODS AND TYPES:
A. Continuous Assessment (60%)
Category Percentage Assessment Method
·         Cognitive

·         Assigment & Communication skills, Team Work and Ethics

30%

30%

Test

Individual Assigment

Group Assigment

B. Final Examination (40%)
Examination 40 % Essay type question
MAIN REFERENCES SUPPORTING THE COURSE 1.   Douglas L. Perry. (2002) VHDL Programming By Example, 4th Edition. Mc Graw Hill.
ADDITIONAL REFERENCES SUPPORTING THE COURSE
  1. Peter J. Ashenden, (2008) “The Designer’s Guide to VHDL, Third Edition (Systems on Silicon)”, ISBN 0-1208-8785-1. (The VHDL reference book written by one of the lead developers of the language)
  2. Janick Bergeron, “Writing Testbenches: Functional Verification of HDL Models”, 2000, ISBN 0-7923-7766-4. (The HDL Testbench Bible).
  3. 1076-2008 – IEEE Standard VHDL Language Reference Manual. 2009. doi:10.1109/IEEESTD.2009.4772740ISBN 978-0-7381-6854-8.