NAME OF COURSE/MODULE: FPGA DESIGN
COURSE CODE: KEE4753
NAME(S) OF ACADEMIC STAFF: TBD
RATIONALE FOR THE INCLUSION OF THE COURSE/MODULE IN THE PROGRAMME: To enhance the skill of modern microelectronic technology. The course will provide an insight into modern modelling/design techniques based on hardware description languages (HDLs). Very high-speed integrated circuit Hardware Description Language (VHDL) is now one of the most popular standard HDLs, which allows the functional/ behavioral description of an engineering system to be combined with a detailed electronic design, enabling the modelling of complex electronic systems.
SEMESTER AND YEAR OFFERED: SEM 7 / YEAR 4
TOTAL STUDENT LEARNING TIME (SLT) FACE TO FACE TOTAL GUIDED AND INDEPENDENT LEARNING
L = Lecture

T = Tutorial

P = Practical

O= Others

L

42

T

 

6

P

 

6

O

 

0

Guided: 54 hours

Independent Learning: 66 hours

Total: 120 hours

CREDIT VALUE: 3
PREREQUISITE (IF ANY): NONE
OBJECTIVES: 1.     To understand the theories of FPGA design.

2.     To provide an overview of FPGA design by conducting experiment.

LEARNING OUTCOMES: Upon successful completion of this course, students should have the ability to:

CLO1: Discuss the essential concept, principles and theories of FPGA design. (C4 – LO1)

CLO2: Conduct FPGA simple design of digital electronic. (P4-LO2)

TRANSFERABLE SKILLS: Students should be able to develop problem solving skills through a process of lectures and tutorials.
TEACHING-LEARNING AND ASSESSMENT STRATEGY: Teaching-learning strategy:

  • The course will be taught through a combination of formal lectures, assignments, group work, blended learning using authentic materials, informal activities and various textbooks.

Assessment strategy:

  • Formative
  • Summative
SYNOPSIS: This course contain of essential element of understanding the VHDL programming
MODE OF DELIVERY: Lectures, Tutorials, Labs
ASSESSMENT METHODS AND TYPES:
A. Continuous Assessment (50%)
Category Percentage
·    Quiz/Test

·    Lab

·    Assignment

30%

10%

10%

B. Final Examination (50%)
i.          Examination 50% Structured and essay type questions
MAIN REFERENCE SUPPORTING THE COURSE 1.        Douglas L Perry.  (2005) VHDL Programming by Example. Willy&Sons.
ADDITIONAL REFERENCES SUPPORTING THE COURSE
  1. Cohn, C., Harper, C. A. 2004. Failure-Free Integrated Circuit Packages). McGraw-Hill Professional.
  2. Beck, F. 1998. Integrated Circuit Failure Analysis: A Guide to Preparation Techniques. John Wiley & Sons.
  3. Shepherd, P. 1996. Integrated Circuit: Design, Fabrication, and Test.  McGraw-Hill Professional Publishing.
  4. Neil H. E. Weste, David Harris, Boston. 2005. CMOS Design